1. Field of the Invention
The present invention refers to a circuit for the speed recovery of a direct current motor and method using said circuit, in particular for a Voice Coil Motor (VCM).
2. Description of the Related Art
A VCM is used for example to drive a mechanical arm on which the writing and/or reading heads for the data registered on a hard disk are mounted.
In said application field in the searching steps for new tracks to be written and/or read, the VCM is capable of giving strong accelerations/decelerations to the mechanical arm that supports the head so as to minimize the track search time.
In fact during these phases the heads can reach speeds on the order of 2÷2.54 m/sec.
A problem that has to be dealt with in a hard disk, in the event that the supply voltage is suddenly cut off, is therefore to prevent the arm supporting the reading and writing heads from hitting, at high speed, against the stop positions inside and outside the platters forming the hard disks.
At present the speed recovery of the VCM has taken on a significant importance with the manufacturers of hard disks, as the rotating speed they reach is very high, and following the introduction of the ramp loading technique, a technique according to which the reading and/or writing heads are parked at the extremity of a ramp made of a plastic material outside the disks, it turns out to be essential that said arm, supporting the so-called heads, is prevented from hitting, at high speed, against said parking ramp.
In the device L6244 produced by the Applicant, in the event of losing power, the output stage which drives the VCM is placed at high impedance so as to measure the speed of the motor through a value of the BEMF (Back Electromagnetic Force) generated by the same VCM. The value of the BEMF is memorized at the terminals of a capacitor so that once the sampling step of the BEMF is terminated, the braking action is executed by turning on the output stage again, that is by applying a voltage which has a value equal to that previously stored in the capacitor, but with an opposite polarity so as to dampen the motion of the VCM. In this condition the capacitor is discharged through of a resistor, thus defining a time of duration of this speed recovery step.
In another device L6246 produced by the Applicant, at the time the power supply is lost, the output stage driving the VCM is placed in the so-called brake configuration, that is, in a configuration wherein the low side transistors of the output bridge are placed in conduction. In this manner it is as if the VCM had its terminals in short circuit and it is therefore the VCM itself that generates a braking current. This braking condition is held for a time which is determined by the discharge constant of a R-C circuit.
In both cases the speed recovery is executed in open loop and the motor is submitted to a braking action for a certain preset time, not keeping, however, the speed of the VCM itself under control.
The effectiveness of these methods is technologically valid but is not sufficient to guarantee the speed recovery, in the time of a few milliseconds, which the modem VCMs are able to develop.
Other systems known for braking the VCM, while keeping control of the speed, drive the Pulse Width Modulation (PWM) type output stage in discontinuous mode. In this manner the braking current is interrupted and zeroed at every period of the PWM signal to permit the measurement of the BEMF and therefore the speed of the VCM itself, thus permitting the determination of the moment for terminating the speed recovery procedure.
In this case the effectiveness of the braking is not particularly energetic as the current must be zeroed periodically to be able to permit the measurement of the BEMF representing the speed of the VCM.
In addition, for all the systems, there is also the problem that in the absence of a supply voltage the only circuitry which remains supplied is that which carries out the parking of the heads, while all the other devices, such as the micro-processor or the Digital Signal Processor (DSP), lose every functionality.
In view of the state of the technique described, an embodiment of the present invention provides a circuit for the efficient and controlled recovery of the speed of a direct current VCM type motor, in particular at the time the power voltage is disconnected after a search for a new track to be read and/or written has been actuated.
A further embodiment of the present invention supplies a method capable of guaranteeing the efficient and controlled recovery of the speed of a VCM.
In accordance with an embodiment of the present invention, a circuit is provided for recovering the speed of a direct current motor comprising an output stage, consisting of a first couple of transistors and of a second couple of transistors, and first means, for detecting a circulating current in said motor, and second means, suitable for activating said second couple of transistors of said output stage for a determined first time period so as to short-circuit said motor, and at the end of said first time period said second means being suitable for unbalancing said output stage in such a manner as to force the maximum circulating current for a determined second time period in function of the value detected by said first means during said first time period so as to stop said motor in the shortest time possible.
another embodiment provides a method for the speed recovery of a direct current motor including
a) checking if there is a loss of supply voltage; b) short-circuiting a first couple of transistors for a first Lime period; c) measuring a current proportional to the rotation speed of said motor; d) measuring a current proportional to the rotation direction of said motor; e) forcing a current of greater intensity than that measured at during the measuring steps and the same polarity for a second time period in said motor;
f) repeating repeating the short circuiting, measuring and forcing steps until said current returns to a determined measure interval; g) generating an end-of-procedure signal.
Thanks to the present invention a circuit and a method can be provided which are capable of preventing the arm supporting the reading and/or writing heads from hitting at high speed against the end-of-stroke positions inside or outside the platters comprising the hard disks.